ASIC Power Engineer
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面议
  • 网申职位
  • |
  • 上海
  • |
  • 若干
  • |
  • 不限工作经验
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职位描述

  • 接受应届生
  • 电子/硬件行业
  • 硬件工程师
招聘人数:若干

                    职位职责:

                    
Shanghai power team is responsible for researching power expenditures and workload efficiency to identify architectural, micro-architectural strategies for power optimization. We want to hire promising talent who can handle project(s) individually/collectively and also add new dimension to the team. 

Responsibilities:
•	Create a methodology/algorithm to evaluate power efficiency on high-level (architecture) designs.
•	Support IP designers using the power flow to do the power scrubbing work and improve their power efficiency on micro-arch (ASIC) level.
•	Understand and perform block level and chip-level power analysis.
•	Communicate/Cooperate with local and abroad teams with power-related projects.
•	Co-work with power ARCH team/IP team to evaluate new low-power technologies and improve chip power efficiency.

Requirements:
•	MSEE/MSCS postgraduate. 
•     Experience in ASIC design/verification, low power knowledge is a strong plus.
•	Must be familiar with at least one of the programming languages, C/C++ (preferred), Python, Perl.
•	Excellent English writing/speaking skills are desired.
•     Good communication skills.

工作地点

上海 收起地图

NVIDIA英伟达